XRT91L31IQ-F

Product Summary

The XRT91L31IQ-F is a fully integrated SONET/SDH transceiver for SONET/SDH 622.08 Mbps STS-12/STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes an on-chip Clock Multiplier Unit (CMU), which uses a high frequency Phase-Locked Loop (PLL) to generate the high-speed transmit serial clock from a slower external clock reference. The XRT91L31IQ-F also provides Clock and Data Recovery (CDR) function by synchronizing its on-chip Voltage Controlled Oscillator (VCO) to the incoming serial data stream. The internal CDR unit can be disabled and bypassed in lieu of an externally recovered received clock from the optical module. The applications of the XRT91L31IQ-F are (1)SONET/SDH-based Transmission Systems; (2)Add/Drop Multiplexers; (3)Cross Connect Equipment; (4)ATM and Multi-Service Switches, Routers and Switch/Routers; (5)DSLAMS; (6)SONET/SDH Test Equipment; (7)DWDM Termination Equipment.

Parametrics

XRT91L31IQ-F absolute maximum ratings: (1)Thermal Resistance of QFP Package: θjA = 45℃/W; (2)Thermal Resistance of QFP Package: θjC = 12℃/W; (3)ESD Protection (HBM): >2000V; (4)Operating Temperature Range: -40 to 85℃; (5)Case Temperature under bias: -55 to 125℃; (6)Storage Temperature: -65 to 150℃.

Features

XRT91L31IQ-F features: (1)Targeted for SONET STS-12/STS-3 and SDH STM-4/STM-1 Applications; (2)Selectable full duplex operation between STS-12/STM-4 standard rate of 622.08 Mbps or STS-3/STM-1 155.52 Mbps; (3)Single-chip fully integrated solution containing parallel-to-serial converter, clock multiplier unit (CMU), serial- to-parallel converter, clock data recovery (CDR) functions, and a SONET/SDH frame and byte boundary detection circuit; (4)Ability to disable and bypass onchip CDR for external based received reference clock recovery thru Differential LVPECL input pins XRXCLKIP/N; (5)8-bit LVTTL parallel data bus paths running at 77.76 Mbps in STS-12/STM-4 or 19.44 Mbps in STS-3/STM-1 mode of operation; (6)Uses Differential LVPECL or Single-Ended LVTTL CMU reference clock frequencies of either 19.44 MHz or 77.76 MHz for both STS-12/STM-1 or STS-3/STM-1 operations.

Diagrams